Abstract: The International Technology Roadmap for Semiconductors(ITRS) predicts the more aggressive scaling rule that the feature size of Si chips will soon reach the 0\^1μm scale. It will be impossible to use SiO2 again as the gate dielectric in next generation devices because of the unacceptable large leakage current. In the search for new alternatives, a novel structure COS(crystalline oxides on semiconductor) has been suggested. Recently, this COS structure was employed to serve as a buffer layer in the epitaxial growth of GaAs on Si substrate.This invention led to a breakthrough in the development of semiconductor materials and device technology. We present a brief review of the background and progress of COS technology.